
debug:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004005e8 <_init>:
  4005e8:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4005ec:	910003fd 	mov	x29, sp
  4005f0:	94000042 	bl	4006f8 <call_weak_fn>
  4005f4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4005f8:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400600 <.plt>:
  400600:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400604:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0x101f4>
  400608:	f947fe11 	ldr	x17, [x16, #4088]
  40060c:	913fe210 	add	x16, x16, #0xff8
  400610:	d61f0220 	br	x17
  400614:	d503201f 	nop
  400618:	d503201f 	nop
  40061c:	d503201f 	nop

0000000000400620 <fputs@plt>:
  400620:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400624:	f9400211 	ldr	x17, [x16]
  400628:	91000210 	add	x16, x16, #0x0
  40062c:	d61f0220 	br	x17

0000000000400630 <fputc@plt>:
  400630:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400634:	f9400611 	ldr	x17, [x16, #8]
  400638:	91002210 	add	x16, x16, #0x8
  40063c:	d61f0220 	br	x17

0000000000400640 <snprintf@plt>:
  400640:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400644:	f9400a11 	ldr	x17, [x16, #16]
  400648:	91004210 	add	x16, x16, #0x10
  40064c:	d61f0220 	br	x17

0000000000400650 <__libc_start_main@plt>:
  400650:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400654:	f9400e11 	ldr	x17, [x16, #24]
  400658:	91006210 	add	x16, x16, #0x18
  40065c:	d61f0220 	br	x17

0000000000400660 <__gmon_start__@plt>:
  400660:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400664:	f9401211 	ldr	x17, [x16, #32]
  400668:	91008210 	add	x16, x16, #0x20
  40066c:	d61f0220 	br	x17

0000000000400670 <abort@plt>:
  400670:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400674:	f9401611 	ldr	x17, [x16, #40]
  400678:	9100a210 	add	x16, x16, #0x28
  40067c:	d61f0220 	br	x17

0000000000400680 <vsnprintf@plt>:
  400680:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400684:	f9401a11 	ldr	x17, [x16, #48]
  400688:	9100c210 	add	x16, x16, #0x30
  40068c:	d61f0220 	br	x17

0000000000400690 <vfprintf@plt>:
  400690:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  400694:	f9401e11 	ldr	x17, [x16, #56]
  400698:	9100e210 	add	x16, x16, #0x38
  40069c:	d61f0220 	br	x17

00000000004006a0 <putchar@plt>:
  4006a0:	d0000090 	adrp	x16, 412000 <fputs@GLIBC_2.17>
  4006a4:	f9402211 	ldr	x17, [x16, #64]
  4006a8:	91010210 	add	x16, x16, #0x40
  4006ac:	d61f0220 	br	x17

Disassembly of section .text:

00000000004006b0 <_start>:
  4006b0:	d280001d 	mov	x29, #0x0                   	// #0
  4006b4:	d280001e 	mov	x30, #0x0                   	// #0
  4006b8:	aa0003e5 	mov	x5, x0
  4006bc:	f94003e1 	ldr	x1, [sp]
  4006c0:	910023e2 	add	x2, sp, #0x8
  4006c4:	910003e6 	mov	x6, sp
  4006c8:	580000c0 	ldr	x0, 4006e0 <_start+0x30>
  4006cc:	580000e3 	ldr	x3, 4006e8 <_start+0x38>
  4006d0:	58000104 	ldr	x4, 4006f0 <_start+0x40>
  4006d4:	97ffffdf 	bl	400650 <__libc_start_main@plt>
  4006d8:	97ffffe6 	bl	400670 <abort@plt>
  4006dc:	00000000 	.inst	0x00000000 ; undefined
  4006e0:	00400b8c 	.word	0x00400b8c
  4006e4:	00000000 	.word	0x00000000
  4006e8:	00400c80 	.word	0x00400c80
  4006ec:	00000000 	.word	0x00000000
  4006f0:	00400d00 	.word	0x00400d00
  4006f4:	00000000 	.word	0x00000000

00000000004006f8 <call_weak_fn>:
  4006f8:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0x101f4>
  4006fc:	f947f000 	ldr	x0, [x0, #4064]
  400700:	b4000040 	cbz	x0, 400708 <call_weak_fn+0x10>
  400704:	17ffffd7 	b	400660 <__gmon_start__@plt>
  400708:	d65f03c0 	ret
  40070c:	00000000 	.inst	0x00000000 ; undefined

0000000000400710 <deregister_tm_clones>:
  400710:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400714:	91016000 	add	x0, x0, #0x58
  400718:	d0000081 	adrp	x1, 412000 <fputs@GLIBC_2.17>
  40071c:	91016021 	add	x1, x1, #0x58
  400720:	eb00003f 	cmp	x1, x0
  400724:	540000a0 	b.eq	400738 <deregister_tm_clones+0x28>  // b.none
  400728:	90000001 	adrp	x1, 400000 <_init-0x5e8>
  40072c:	f9469021 	ldr	x1, [x1, #3360]
  400730:	b4000041 	cbz	x1, 400738 <deregister_tm_clones+0x28>
  400734:	d61f0020 	br	x1
  400738:	d65f03c0 	ret
  40073c:	d503201f 	nop

0000000000400740 <register_tm_clones>:
  400740:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400744:	91016000 	add	x0, x0, #0x58
  400748:	d0000081 	adrp	x1, 412000 <fputs@GLIBC_2.17>
  40074c:	91016021 	add	x1, x1, #0x58
  400750:	cb000021 	sub	x1, x1, x0
  400754:	9343fc21 	asr	x1, x1, #3
  400758:	8b41fc21 	add	x1, x1, x1, lsr #63
  40075c:	9341fc21 	asr	x1, x1, #1
  400760:	b40000a1 	cbz	x1, 400774 <register_tm_clones+0x34>
  400764:	90000002 	adrp	x2, 400000 <_init-0x5e8>
  400768:	f9469442 	ldr	x2, [x2, #3368]
  40076c:	b4000042 	cbz	x2, 400774 <register_tm_clones+0x34>
  400770:	d61f0040 	br	x2
  400774:	d65f03c0 	ret

0000000000400778 <__do_global_dtors_aux>:
  400778:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40077c:	910003fd 	mov	x29, sp
  400780:	f9000bf3 	str	x19, [sp, #16]
  400784:	d0000093 	adrp	x19, 412000 <fputs@GLIBC_2.17>
  400788:	39418260 	ldrb	w0, [x19, #96]
  40078c:	35000080 	cbnz	w0, 40079c <__do_global_dtors_aux+0x24>
  400790:	97ffffe0 	bl	400710 <deregister_tm_clones>
  400794:	52800020 	mov	w0, #0x1                   	// #1
  400798:	39018260 	strb	w0, [x19, #96]
  40079c:	f9400bf3 	ldr	x19, [sp, #16]
  4007a0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4007a4:	d65f03c0 	ret

00000000004007a8 <frame_dummy>:
  4007a8:	17ffffe6 	b	400740 <register_tm_clones>

00000000004007ac <ac_trace_printer_default>:
  4007ac:	a9b87bfd 	stp	x29, x30, [sp, #-128]!
  4007b0:	910003fd 	mov	x29, sp
  4007b4:	f9000bf3 	str	x19, [sp, #16]
  4007b8:	b9004fa0 	str	w0, [x29, #76]
  4007bc:	f90023a1 	str	x1, [x29, #64]
  4007c0:	aa0203f3 	mov	x19, x2
  4007c4:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  4007c8:	91370001 	add	x1, x0, #0xdc0
  4007cc:	910143a0 	add	x0, x29, #0x50
  4007d0:	a9400c22 	ldp	x2, x3, [x1]
  4007d4:	a9000c02 	stp	x2, x3, [x0]
  4007d8:	a9410c22 	ldp	x2, x3, [x1, #16]
  4007dc:	a9010c02 	stp	x2, x3, [x0, #16]
  4007e0:	a9420821 	ldp	x1, x2, [x1, #32]
  4007e4:	a9020801 	stp	x1, x2, [x0, #32]
  4007e8:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  4007ec:	91016000 	add	x0, x0, #0x58
  4007f0:	f9400002 	ldr	x2, [x0]
  4007f4:	b9804fa0 	ldrsw	x0, [x29, #76]
  4007f8:	d37df000 	lsl	x0, x0, #3
  4007fc:	910143a1 	add	x1, x29, #0x50
  400800:	f8606820 	ldr	x0, [x1, x0]
  400804:	aa0203e1 	mov	x1, x2
  400808:	97ffff86 	bl	400620 <fputs@plt>
  40080c:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400810:	91016000 	add	x0, x0, #0x58
  400814:	f9400004 	ldr	x4, [x0]
  400818:	910083a2 	add	x2, x29, #0x20
  40081c:	aa1303e3 	mov	x3, x19
  400820:	a9400460 	ldp	x0, x1, [x3]
  400824:	a9000440 	stp	x0, x1, [x2]
  400828:	a9410460 	ldp	x0, x1, [x3, #16]
  40082c:	a9010440 	stp	x0, x1, [x2, #16]
  400830:	910083a0 	add	x0, x29, #0x20
  400834:	aa0003e2 	mov	x2, x0
  400838:	f94023a1 	ldr	x1, [x29, #64]
  40083c:	aa0403e0 	mov	x0, x4
  400840:	97ffff94 	bl	400690 <vfprintf@plt>
  400844:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400848:	91016000 	add	x0, x0, #0x58
  40084c:	f9400000 	ldr	x0, [x0]
  400850:	aa0003e1 	mov	x1, x0
  400854:	52800140 	mov	w0, #0xa                   	// #10
  400858:	97ffff76 	bl	400630 <fputc@plt>
  40085c:	d503201f 	nop
  400860:	f9400bf3 	ldr	x19, [sp, #16]
  400864:	a8c87bfd 	ldp	x29, x30, [sp], #128
  400868:	d65f03c0 	ret

000000000040086c <ac_trace_setup>:
  40086c:	d10043ff 	sub	sp, sp, #0x10
  400870:	b9000fe0 	str	w0, [sp, #12]
  400874:	f90003e1 	str	x1, [sp]
  400878:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  40087c:	9101a000 	add	x0, x0, #0x68
  400880:	b9400fe1 	ldr	w1, [sp, #12]
  400884:	b9000001 	str	w1, [x0]
  400888:	b9400fe0 	ldr	w0, [sp, #12]
  40088c:	7100001f 	cmp	w0, #0x0
  400890:	540000aa 	b.ge	4008a4 <ac_trace_setup+0x38>  // b.tcont
  400894:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400898:	9101a000 	add	x0, x0, #0x68
  40089c:	b900001f 	str	wzr, [x0]
  4008a0:	14000008 	b	4008c0 <ac_trace_setup+0x54>
  4008a4:	b9400fe0 	ldr	w0, [sp, #12]
  4008a8:	7100181f 	cmp	w0, #0x6
  4008ac:	540000ad 	b.le	4008c0 <ac_trace_setup+0x54>
  4008b0:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  4008b4:	9101a000 	add	x0, x0, #0x68
  4008b8:	528000c1 	mov	w1, #0x6                   	// #6
  4008bc:	b9000001 	str	w1, [x0]
  4008c0:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  4008c4:	9101c000 	add	x0, x0, #0x70
  4008c8:	f94003e1 	ldr	x1, [sp]
  4008cc:	f9000001 	str	x1, [x0]
  4008d0:	d503201f 	nop
  4008d4:	910043ff 	add	sp, sp, #0x10
  4008d8:	d65f03c0 	ret

00000000004008dc <ac_trace>:
  4008dc:	a9af7bfd 	stp	x29, x30, [sp, #-272]!
  4008e0:	910003fd 	mov	x29, sp
  4008e4:	b9003fa0 	str	w0, [x29, #60]
  4008e8:	f9001ba1 	str	x1, [x29, #48]
  4008ec:	f90073a2 	str	x2, [x29, #224]
  4008f0:	f90077a3 	str	x3, [x29, #232]
  4008f4:	f9007ba4 	str	x4, [x29, #240]
  4008f8:	f9007fa5 	str	x5, [x29, #248]
  4008fc:	f90083a6 	str	x6, [x29, #256]
  400900:	f90087a7 	str	x7, [x29, #264]
  400904:	3d801ba0 	str	q0, [x29, #96]
  400908:	3d801fa1 	str	q1, [x29, #112]
  40090c:	3d8023a2 	str	q2, [x29, #128]
  400910:	3d8027a3 	str	q3, [x29, #144]
  400914:	3d802ba4 	str	q4, [x29, #160]
  400918:	3d802fa5 	str	q5, [x29, #176]
  40091c:	3d8033a6 	str	q6, [x29, #192]
  400920:	3d8037a7 	str	q7, [x29, #208]
  400924:	b9403fa0 	ldr	w0, [x29, #60]
  400928:	7100001f 	cmp	w0, #0x0
  40092c:	54000480 	b.eq	4009bc <ac_trace+0xe0>  // b.none
  400930:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400934:	9101a000 	add	x0, x0, #0x68
  400938:	b9400000 	ldr	w0, [x0]
  40093c:	b9403fa1 	ldr	w1, [x29, #60]
  400940:	6b00003f 	cmp	w1, w0
  400944:	540003cc 	b.gt	4009bc <ac_trace+0xe0>
  400948:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  40094c:	9101c000 	add	x0, x0, #0x70
  400950:	f9400000 	ldr	x0, [x0]
  400954:	f100001f 	cmp	x0, #0x0
  400958:	54000320 	b.eq	4009bc <ac_trace+0xe0>  // b.none
  40095c:	910443a0 	add	x0, x29, #0x110
  400960:	f90023a0 	str	x0, [x29, #64]
  400964:	910443a0 	add	x0, x29, #0x110
  400968:	f90027a0 	str	x0, [x29, #72]
  40096c:	910383a0 	add	x0, x29, #0xe0
  400970:	f9002ba0 	str	x0, [x29, #80]
  400974:	128005e0 	mov	w0, #0xffffffd0            	// #-48
  400978:	b9005ba0 	str	w0, [x29, #88]
  40097c:	12800fe0 	mov	w0, #0xffffff80            	// #-128
  400980:	b9005fa0 	str	w0, [x29, #92]
  400984:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400988:	9101c000 	add	x0, x0, #0x70
  40098c:	f9400004 	ldr	x4, [x0]
  400990:	910043a2 	add	x2, x29, #0x10
  400994:	910103a3 	add	x3, x29, #0x40
  400998:	a9400460 	ldp	x0, x1, [x3]
  40099c:	a9000440 	stp	x0, x1, [x2]
  4009a0:	a9410460 	ldp	x0, x1, [x3, #16]
  4009a4:	a9010440 	stp	x0, x1, [x2, #16]
  4009a8:	910043a0 	add	x0, x29, #0x10
  4009ac:	aa0003e2 	mov	x2, x0
  4009b0:	f9401ba1 	ldr	x1, [x29, #48]
  4009b4:	b9403fa0 	ldr	w0, [x29, #60]
  4009b8:	d63f0080 	blr	x4
  4009bc:	d503201f 	nop
  4009c0:	a8d17bfd 	ldp	x29, x30, [sp], #272
  4009c4:	d65f03c0 	ret

00000000004009c8 <ac_trace_get_level>:
  4009c8:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  4009cc:	9101a000 	add	x0, x0, #0x68
  4009d0:	b9400000 	ldr	w0, [x0]
  4009d4:	d65f03c0 	ret

00000000004009d8 <_ac_trace>:
  4009d8:	a9b77bfd 	stp	x29, x30, [sp, #-144]!
  4009dc:	910003fd 	mov	x29, sp
  4009e0:	f9000bf3 	str	x19, [sp, #16]
  4009e4:	b9004fa0 	str	w0, [x29, #76]
  4009e8:	f90023a1 	str	x1, [x29, #64]
  4009ec:	aa0203f3 	mov	x19, x2
  4009f0:	b90087bf 	str	wzr, [x29, #132]
  4009f4:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  4009f8:	9101e000 	add	x0, x0, #0x78
  4009fc:	f90047a0 	str	x0, [x29, #136]
  400a00:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400a04:	91370001 	add	x1, x0, #0xdc0
  400a08:	910143a0 	add	x0, x29, #0x50
  400a0c:	a9400c22 	ldp	x2, x3, [x1]
  400a10:	a9000c02 	stp	x2, x3, [x0]
  400a14:	a9410c22 	ldp	x2, x3, [x1, #16]
  400a18:	a9010c02 	stp	x2, x3, [x0, #16]
  400a1c:	a9420821 	ldp	x1, x2, [x1, #32]
  400a20:	a9020801 	stp	x1, x2, [x0, #32]
  400a24:	b94087a1 	ldr	w1, [x29, #132]
  400a28:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400a2c:	9101e000 	add	x0, x0, #0x78
  400a30:	8b000024 	add	x4, x1, x0
  400a34:	b94087a0 	ldr	w0, [x29, #132]
  400a38:	d2804001 	mov	x1, #0x200                 	// #512
  400a3c:	cb000025 	sub	x5, x1, x0
  400a40:	b9804fa0 	ldrsw	x0, [x29, #76]
  400a44:	d37df000 	lsl	x0, x0, #3
  400a48:	910143a1 	add	x1, x29, #0x50
  400a4c:	f8606821 	ldr	x1, [x1, x0]
  400a50:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400a54:	9137c000 	add	x0, x0, #0xdf0
  400a58:	aa0103e3 	mov	x3, x1
  400a5c:	aa0003e2 	mov	x2, x0
  400a60:	aa0503e1 	mov	x1, x5
  400a64:	aa0403e0 	mov	x0, x4
  400a68:	97fffef6 	bl	400640 <snprintf@plt>
  400a6c:	2a0003e1 	mov	w1, w0
  400a70:	b94087a0 	ldr	w0, [x29, #132]
  400a74:	0b010000 	add	w0, w0, w1
  400a78:	b90087a0 	str	w0, [x29, #132]
  400a7c:	b94087a0 	ldr	w0, [x29, #132]
  400a80:	7107fc1f 	cmp	w0, #0x1ff
  400a84:	54000748 	b.hi	400b6c <_ac_trace+0x194>  // b.pmore
  400a88:	b94087a1 	ldr	w1, [x29, #132]
  400a8c:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400a90:	9101e000 	add	x0, x0, #0x78
  400a94:	8b000024 	add	x4, x1, x0
  400a98:	b94087a0 	ldr	w0, [x29, #132]
  400a9c:	d2804001 	mov	x1, #0x200                 	// #512
  400aa0:	cb000025 	sub	x5, x1, x0
  400aa4:	910083a2 	add	x2, x29, #0x20
  400aa8:	aa1303e3 	mov	x3, x19
  400aac:	a9400460 	ldp	x0, x1, [x3]
  400ab0:	a9000440 	stp	x0, x1, [x2]
  400ab4:	a9410460 	ldp	x0, x1, [x3, #16]
  400ab8:	a9010440 	stp	x0, x1, [x2, #16]
  400abc:	910083a0 	add	x0, x29, #0x20
  400ac0:	aa0003e3 	mov	x3, x0
  400ac4:	f94023a2 	ldr	x2, [x29, #64]
  400ac8:	aa0503e1 	mov	x1, x5
  400acc:	aa0403e0 	mov	x0, x4
  400ad0:	97fffeec 	bl	400680 <vsnprintf@plt>
  400ad4:	2a0003e1 	mov	w1, w0
  400ad8:	b94087a0 	ldr	w0, [x29, #132]
  400adc:	0b010000 	add	w0, w0, w1
  400ae0:	b90087a0 	str	w0, [x29, #132]
  400ae4:	b94087a0 	ldr	w0, [x29, #132]
  400ae8:	7107fc1f 	cmp	w0, #0x1ff
  400aec:	54000448 	b.hi	400b74 <_ac_trace+0x19c>  // b.pmore
  400af0:	b94087a1 	ldr	w1, [x29, #132]
  400af4:	d0000080 	adrp	x0, 412000 <fputs@GLIBC_2.17>
  400af8:	9101e000 	add	x0, x0, #0x78
  400afc:	8b000023 	add	x3, x1, x0
  400b00:	b94087a0 	ldr	w0, [x29, #132]
  400b04:	d2804001 	mov	x1, #0x200                 	// #512
  400b08:	cb000021 	sub	x1, x1, x0
  400b0c:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400b10:	9137e000 	add	x0, x0, #0xdf8
  400b14:	aa0003e2 	mov	x2, x0
  400b18:	aa0303e0 	mov	x0, x3
  400b1c:	97fffec9 	bl	400640 <snprintf@plt>
  400b20:	2a0003e1 	mov	w1, w0
  400b24:	b94087a0 	ldr	w0, [x29, #132]
  400b28:	0b010000 	add	w0, w0, w1
  400b2c:	b90087a0 	str	w0, [x29, #132]
  400b30:	b94087a0 	ldr	w0, [x29, #132]
  400b34:	7107fc1f 	cmp	w0, #0x1ff
  400b38:	54000228 	b.hi	400b7c <_ac_trace+0x1a4>  // b.pmore
  400b3c:	14000007 	b	400b58 <_ac_trace+0x180>
  400b40:	f94047a0 	ldr	x0, [x29, #136]
  400b44:	39400000 	ldrb	w0, [x0]
  400b48:	97fffed6 	bl	4006a0 <putchar@plt>
  400b4c:	f94047a0 	ldr	x0, [x29, #136]
  400b50:	91000400 	add	x0, x0, #0x1
  400b54:	f90047a0 	str	x0, [x29, #136]
  400b58:	f94047a0 	ldr	x0, [x29, #136]
  400b5c:	39400000 	ldrb	w0, [x0]
  400b60:	7100001f 	cmp	w0, #0x0
  400b64:	54fffee1 	b.ne	400b40 <_ac_trace+0x168>  // b.any
  400b68:	14000006 	b	400b80 <_ac_trace+0x1a8>
  400b6c:	d503201f 	nop
  400b70:	14000004 	b	400b80 <_ac_trace+0x1a8>
  400b74:	d503201f 	nop
  400b78:	14000002 	b	400b80 <_ac_trace+0x1a8>
  400b7c:	d503201f 	nop
  400b80:	f9400bf3 	ldr	x19, [sp, #16]
  400b84:	a8c97bfd 	ldp	x29, x30, [sp], #144
  400b88:	d65f03c0 	ret

0000000000400b8c <main>:
  400b8c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400b90:	910003fd 	mov	x29, sp
  400b94:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400b98:	91276000 	add	x0, x0, #0x9d8
  400b9c:	aa0003e1 	mov	x1, x0
  400ba0:	528000a0 	mov	w0, #0x5                   	// #5
  400ba4:	97ffff32 	bl	40086c <ac_trace_setup>
  400ba8:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400bac:	91380000 	add	x0, x0, #0xe00
  400bb0:	aa0003e1 	mov	x1, x0
  400bb4:	528000a0 	mov	w0, #0x5                   	// #5
  400bb8:	97ffff49 	bl	4008dc <ac_trace>
  400bbc:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400bc0:	91382000 	add	x0, x0, #0xe08
  400bc4:	52807ce2 	mov	w2, #0x3e7                 	// #999
  400bc8:	aa0003e1 	mov	x1, x0
  400bcc:	52800060 	mov	w0, #0x3                   	// #3
  400bd0:	97ffff43 	bl	4008dc <ac_trace>
  400bd4:	97ffff7d 	bl	4009c8 <ac_trace_get_level>
  400bd8:	2a0003e1 	mov	w1, w0
  400bdc:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400be0:	91382000 	add	x0, x0, #0xe08
  400be4:	2a0103e2 	mov	w2, w1
  400be8:	aa0003e1 	mov	x1, x0
  400bec:	52800020 	mov	w0, #0x1                   	// #1
  400bf0:	97ffff3b 	bl	4008dc <ac_trace>
  400bf4:	97ffff75 	bl	4009c8 <ac_trace_get_level>
  400bf8:	2a0003e1 	mov	w1, w0
  400bfc:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400c00:	91382000 	add	x0, x0, #0xe08
  400c04:	2a0103e2 	mov	w2, w1
  400c08:	aa0003e1 	mov	x1, x0
  400c0c:	52800040 	mov	w0, #0x2                   	// #2
  400c10:	97ffff33 	bl	4008dc <ac_trace>
  400c14:	97ffff6d 	bl	4009c8 <ac_trace_get_level>
  400c18:	2a0003e1 	mov	w1, w0
  400c1c:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400c20:	91382000 	add	x0, x0, #0xe08
  400c24:	2a0103e2 	mov	w2, w1
  400c28:	aa0003e1 	mov	x1, x0
  400c2c:	52800080 	mov	w0, #0x4                   	// #4
  400c30:	97ffff2b 	bl	4008dc <ac_trace>
  400c34:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400c38:	911eb000 	add	x0, x0, #0x7ac
  400c3c:	aa0003e1 	mov	x1, x0
  400c40:	528000a0 	mov	w0, #0x5                   	// #5
  400c44:	97ffff0a 	bl	40086c <ac_trace_setup>
  400c48:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400c4c:	91380000 	add	x0, x0, #0xe00
  400c50:	aa0003e1 	mov	x1, x0
  400c54:	528000a0 	mov	w0, #0x5                   	// #5
  400c58:	97ffff21 	bl	4008dc <ac_trace>
  400c5c:	90000000 	adrp	x0, 400000 <_init-0x5e8>
  400c60:	91382000 	add	x0, x0, #0xe08
  400c64:	52807ce2 	mov	w2, #0x3e7                 	// #999
  400c68:	aa0003e1 	mov	x1, x0
  400c6c:	52800060 	mov	w0, #0x3                   	// #3
  400c70:	97ffff1b 	bl	4008dc <ac_trace>
  400c74:	d503201f 	nop
  400c78:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400c7c:	d65f03c0 	ret

0000000000400c80 <__libc_csu_init>:
  400c80:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400c84:	910003fd 	mov	x29, sp
  400c88:	a901d7f4 	stp	x20, x21, [sp, #24]
  400c8c:	b0000094 	adrp	x20, 411000 <__FRAME_END__+0x101f4>
  400c90:	b0000095 	adrp	x21, 411000 <__FRAME_END__+0x101f4>
  400c94:	91374294 	add	x20, x20, #0xdd0
  400c98:	913722b5 	add	x21, x21, #0xdc8
  400c9c:	a902dff6 	stp	x22, x23, [sp, #40]
  400ca0:	cb150294 	sub	x20, x20, x21
  400ca4:	f9001ff8 	str	x24, [sp, #56]
  400ca8:	2a0003f6 	mov	w22, w0
  400cac:	aa0103f7 	mov	x23, x1
  400cb0:	9343fe94 	asr	x20, x20, #3
  400cb4:	aa0203f8 	mov	x24, x2
  400cb8:	97fffe4c 	bl	4005e8 <_init>
  400cbc:	b4000194 	cbz	x20, 400cec <__libc_csu_init+0x6c>
  400cc0:	f9000bb3 	str	x19, [x29, #16]
  400cc4:	d2800013 	mov	x19, #0x0                   	// #0
  400cc8:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400ccc:	aa1803e2 	mov	x2, x24
  400cd0:	aa1703e1 	mov	x1, x23
  400cd4:	2a1603e0 	mov	w0, w22
  400cd8:	91000673 	add	x19, x19, #0x1
  400cdc:	d63f0060 	blr	x3
  400ce0:	eb13029f 	cmp	x20, x19
  400ce4:	54ffff21 	b.ne	400cc8 <__libc_csu_init+0x48>  // b.any
  400ce8:	f9400bb3 	ldr	x19, [x29, #16]
  400cec:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400cf0:	a942dff6 	ldp	x22, x23, [sp, #40]
  400cf4:	f9401ff8 	ldr	x24, [sp, #56]
  400cf8:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400cfc:	d65f03c0 	ret

0000000000400d00 <__libc_csu_fini>:
  400d00:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400d04 <_fini>:
  400d04:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400d08:	910003fd 	mov	x29, sp
  400d0c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400d10:	d65f03c0 	ret
